Since the first Hack@DAC hacking competition in 2017, thousands of security engineers have helped discover hardware-based vulnerabilities, develop mitigation methods, and perform root cause analysis of detected problems.
Intel initially decided to hold a competition, which attracts security professionals from academia and industry partners around the world, to raise awareness about hardware-based vulnerabilities and promote the need for more detection tools, says Arun Kanuparthi , principal engineer and offensive security researcher. to Intel. Another goal behind Hack@DAC, capture-the-flag competitions and other hackathons to get the attention of chip designers, to motivate them to design silicon more securely, he says.
“There is very little awareness of hardware security weaknesses in general,” says Kanuparthi, who spoke about the lessons Intel has learned over the years with Hack@DAC at the recent Black Hat Asia conference in Singapore. “And we thought, really, how do we get this awareness in the security research community?”
“If you look at software, there are a lot of tools for security, with software or firmware, but when you look at hardware, there are only a handful of EDA or electronic design automation tools,” Kanuparthi says.
These types of events are effective in bringing people together to identify vulnerabilities and share their knowledge. CTFs are established methods for teaching and learning new skills and best practices. Intel also believes it’s important to give students “an experience of what it’s like to be a security researcher at an engineering company,” Kanuparthi says.
Intel is now accepting entries for Hack@DAC 2024, which will take place in June in San Francisco.
Tackle difficult problems
When Intel first organized Hack@DAC, there was no standard design or open source platform for discovering or sharing information about hardware vulnerabilities, says Hareesh Khattri, a principal engineer for offensive security research at Intel. This changed with Intel’s collaboration with Texas A&M University and the Technical University of Darmstadt in Germany. Professors and students took open source projects and plugged in existing hardware vulnerabilities to create a common framework for detecting them and new ones.
“And now many research papers on hardware security have also started citing this work,” says Khattri.
In 2020, Intel joined other semiconductor manufacturers in aligning with MITER Common Weaknesses Enumeration (CWE) team, which lists and classifies potential vulnerabilities in software, hardware and firmware to focus more attention on the hardware. This was an attempt to fill a gap, since MITER only handled software weakness types and CWE failed to address root cause analyzes of hardware vulnerabilities, Kanuparthi recalls.
“If a hardware problem has been identified, [the CWE] they would be labeled with a kind of generic catch-all [alert that said] there’s a problem or the system isn’t working as expected,” Kanuparthi says. “But now there’s a design view for the hardware that you can make that specifically be the problem. And that was largely a result of some of the work that we did that led to the hack and the creation of the hybrid CWE.”
As semiconductor manufacturers accelerate their focus on adding designs that can support new AI capabilities, security researchers are trying to identify weaknesses even closer to the hardware design, Khattri adds. This has accelerated interest in new efforts like the one contributed by Google OpenTitan projectan open source reference design and integration guidelines to ensure the root of reliability of RoT chips.
The efforts behind Hack@DAC and Intel’s work with MITER on CWE have led to improved tools, Khattri says. For example, the vendor of hardware vulnerability assessment tools Cycuity (which uses OpenTitan as a benchmark for how its tool measures CWE) says its Radix can now identify 80% of known hardware weaknesses in the CWE database.
“We’ve seen a lot of progress in this space since we started it,” Khattri says. “Now, the focus of much of the security research community has been on trying to identify weaknesses closer to the hardware design.”